// -----------------------------------------------------------------------------
// Copyright (c) 2014-2023 All rights reserved
// *********************************************************************************
// Project Name : CLA
// Author       : DFY
// File Name    : add_tc_16_16.v
// Abstract     : 4bit Carry_lookahead Adder 
module add_tc_16_16 (
	input		[15:0]	a,  //	
	input 		[15:0]	b,	//  

	output 		[16:0]	sum //	
);
//=================================================================================
// Signal and Parameter declaration
//=================================================================================
wire [15:0] g,p;
wire [ 3:0] gm,pm;
wire c3,c7,c11,c15;

//=================================================================================
// Body
//=================================================================================
assign g = a&b;
assign p = a|b;

assign sum[16] = a[15]^b[15]^c15; // extend to 17
CLA_4 inst0_CLA_4   (.a(a[3:0]),   .b(b[3:0]),   .cin(1'b0),  .sum(sum[3:0]));
CLA_4 inst1_CLA_4   (.a(a[7:4]),   .b(b[7:4]),   .cin(c3),  .sum(sum[7:4]));
CLA_4 inst2_CLA_4   (.a(a[11:8]),  .b(b[11:8]),  .cin(c7),  .sum(sum[11:8]));
CLA_4 inst3_CLA_4   (.a(a[15:12]), .b(b[15:12]), .cin(c11),  .sum(sum[15:12]));

GM_gen inst0_GM_gen (.g(g[3:0]),   .p(p[3:0]),   .gm(gm[0]), .pm(pm[0]));
GM_gen inst1_GM_gen (.g(g[7:4]),   .p(p[7:4]),   .gm(gm[1]), .pm(pm[1]));
GM_gen inst2_GM_gen (.g(g[11:8]),  .p(p[11:8]),  .gm(gm[2]), .pm(pm[2]));
GM_gen inst3_GM_gen (.g(g[15:12]), .p(p[15:12]), .gm(gm[3]), .pm(pm[3]));

C_gen  inst_C_gen   (.gm(gm), .pm(pm), .cin(1'b0), .c3(c3), .c7(c7), .c11(c11), .c15(c15));

endmodule 
